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Research Ecosystem

A systematic research program building toward fully automated analog design — from foundational datasets to complete physical layout generation.

Publications

Research Papers

Four interconnected papers forming a cohesive research ecosystem advancing the state of the art toward truly autonomous analog design automation.

ISCAS 2026 2026

EM-Aware Physical Synthesis: Neural Inductor Modeling and Intelligent Placement & Routing for RF Circuits

Extends the FALCON vision from schematic-level to complete physical layout generation. Features a neural inductor model with EM-accurate predictions across 1–100 GHz, intelligent P-Cell optimization for DRC compliance, and a complete placement and routing engine — enabling full netlist-to-GDSII automation for 22-nm CMOS RF circuits.

Yilun Huang, Asal Mehradfar, Salman Avestimehr, Hamidreza Aghasi

arXiv GitHub
NeurIPS 2025 FALCON Flagship 2025

FALCON: An ML Framework for Fully Automated Layout-Constrained Analog Circuit Design

The unified ML framework that brings it all together. FALCON integrates performance-driven topology selection, edge-centric GNN forward modeling, and gradient-based layout-aware parameter inference into a single end-to-end pipeline. Trained on 1M+ Cadence Spectre-simulated mm-wave circuits across 20 topologies, achieving >99% topology accuracy, <10% prediction error, and sub-second design time.

Asal Mehradfar, Xuzhe Zhao, Yilun Huang, Emir Ceyani, Yankai Yang, Shihao Han, Hamidreza Aghasi, Salman Avestimehr

arXiv GitHub NeurIPS OpenReview
arXiv Preprint 2025

Supervised Learning for Analog and RF Circuit Design: Benchmarks and Comparative Insights

A comprehensive evaluation of supervised ML approaches for designing circuit parameters from performance specifications. Benchmarks diverse models from transformers to random forests, revealing that simpler circuits (LNAs) achieve 0.3% mean relative error while complex circuits (PAs, VCOs) benefit from deeper architectures.

Asal Mehradfar, Xuzhe Zhao, Yue Niu, Sara Babakniya, Mahdi Alesheikh, Hamidreza Aghasi, Salman Avestimehr

arXiv
NeurIPS ML4PS 2024 2024

AICircuit: A Multi-Level Dataset and Benchmark for AI-Driven Analog Integrated Circuit Design

The foundational dataset and benchmark that enabled our research program. Introduces a comprehensive multi-level dataset of 7 core analog/RF circuits and 2 complex wireless transceiver systems, simulated with Cadence Spectre. Evaluates MLPs, Transformers, SVRs, and other ML models for circuit design tasks.

Asal Mehradfar, Xuzhe Zhao, Yue Niu, Sara Babakniya, Mahdi Alesheikh, Hamidreza Aghasi, Salman Avestimehr

arXiv GitHub
Citation

Cite Our Work

If you find our research useful, please consider citing the relevant papers.

EM-Aware Physical Synthesis — ISCAS 2026 
@inproceedings{Huang2026EMAware,
  title     = {{EM}-Aware Physical Synthesis: Neural Inductor Modeling and Intelligent Placement & Routing for {RF} Circuits},
  author    = {Huang, Yilun and Mehradfar, Asal and Avestimehr, Salman and Aghasi, Hamidreza},
  booktitle = {IEEE International Symposium on Circuits and Systems (ISCAS)},
  year      = {2026}
}
FALCON — NeurIPS 2025 
@inproceedings{Mehradfar2025FALCON,
  title     = {{FALCON}: An {ML} Framework for Fully Automated Layout-Constrained Analog Circuit Design},
  author    = {Mehradfar, Asal and Zhao, Xuzhe and Huang, Yilun and Ceyani, Emir and Yang, Yankai and Han, Shihao and Aghasi, Hamidreza and Avestimehr, Salman},
  booktitle = {The Thirty-ninth Annual Conference on Neural Information Processing Systems},
  year      = {2025}
}
Supervised Learning Benchmarks — 2025 
@article{Mehradfar2025Supervised,
  title     = {Supervised Learning for Analog and {RF} Circuit Design: Benchmarks and Comparative Insights},
  author    = {Mehradfar, Asal and Zhao, Xuzhe and Niu, Yue and Babakniya, Sara and Alesheikh, Mahdi and Aghasi, Hamidreza and Avestimehr, Salman},
  journal   = {arXiv preprint arXiv:2501.11839},
  year      = {2025}
}
AICircuit — NeurIPS ML4PS 2024 
@article{Mehradfar2024AICircuit,
  title     = {{AICircuit}: A Multi-Level Dataset and Benchmark for {AI}-Driven Analog Integrated Circuit Design},
  author    = {Mehradfar, Asal and Zhao, Xuzhe and Niu, Yue and Babakniya, Sara and Alesheikh, Mahdi and Aghasi, Hamidreza and Avestimehr, Salman},
  journal = {Machine Learning and the Physical Sciences Workshop at NeurIPS 2024},
  year      = {2024}
}